Can I use spread spectrum reference clock (SSC) for External Memory Interfaces Intel® FPGA IP?

Spread Spectrum Clocking is mentioned by JEDEC and  our documentation states that the I/O phase-locked loop (PLL) used by the External Memory Interfaces Intel® FPGA IP supports Spread Spectrum Clocking. This may lead you to a conclusion that you can use Spread Spectrum Clocking for the External Memory Interfaces Intel® FPGA IP. 

Spread Spectrum Clocking (SSC) is not supported with the External Memory Interfaces Intel® FPGA IP because of the timing closure perspective. 

The External Memory Interfaces Intel® FPGA IP User Gude will be updated with this information.