Article ID: 000093193 Content Type: Troubleshooting Last Reviewed: 12/08/2022

Why does the HPRXM interface of the Intel® Arria® 10 or Intel® Cyclone® 10 Avalon® Memory-Mapped (Avalon-MM) DMA Interface for PCI Express* output incorrect byte enables for burst write transactions?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Intel® Arria® 10 Cyclone® 10 Hard IP for PCI Express
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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.1 and earlier, the Intel® Arria® 10 or Intel® Cyclone® 10 Avalon® Memory-Mapped (Avalon-MM) DMA Interface for PCI Express* configured with a 128-bit interface and burst-capable RXM BAR2 port may output incorrect byte enables on the first and last write transactions on the HPRXM interface for a burst write.

    Resolution

    This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software version 22.2.

    Related Products

    This article applies to 2 products

    Intel® Arria® 10 GX FPGA
    Intel® Cyclone® 10 GX FPGA

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