Article ID: 000092748 Content Type: Errata Last Reviewed: 10/26/2022

Why does it take a long time until the SDI II Intel® FPGA IP Receiver detects video standard when receiving SD-SDI video standard?

Environment

  • Intel® Quartus® Prime Design Software
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and Standard Edition software version 21.1 and earlier, it might take a long time until the SDI II Intel® FPGA IP Receiver detects video standard when receiving SD-SDI video standard.

    This problem might occur when the clock sources of the rx_coreclk and the xcvr_refclk in the SDI II Intel FPGA IP are 0 ppm tolerance.

    Resolution

    A patch is available to fix this problem for the Intel® Quartus® Prime Standard Edition Software version 18.1.
    Download and install patch 0.23std from the appropriate link below, then re-generate your programming file.

    This problem is scheduled to be fixed in a future release of the Intel Quartus Prime Pro/Standard Edition Software.

    Related Products

    This article applies to 7 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs
    Intel Agilex® 7 FPGAs and SoC FPGAs I-Series
    Arria® V FPGAs and SoC FPGAs
    Intel® Arria® 10 FPGAs and SoC FPGAs
    Cyclone® V FPGAs and SoC FPGAs
    Intel® Cyclone® 10 GX FPGA
    Stratix® V FPGAs

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