Article ID: 000092446 Content Type: Errata Last Reviewed: 10/20/2022

Why does an underflow error occur on the transmitter path for the F-Tile Interlaken Intel® FPGA IP with a single segment design?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier, you might see itx_underflow asserted in an F-Tile Interlaken Intel® FPGA IP single-segment design. It will cause the Physical Medium Attachment (PMA) to lose lock.

    Resolution

    There is no workaround for this problem. When the error occurs, you need to reset both the F-Tile Interlaken Intel® FPGA IP and the transceiver to re-establish the link.

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs I-Series

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