Article ID: 000092409 Content Type: Troubleshooting Last Reviewed: 12/09/2024

Why does Arria® 10 HPS EMAC RMII interface not work with default 250 MHz EMAC clock?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Hard Processor System Intel® Arria® 10 FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When selecting RMII interface for Arria® 10 HPS EMAC and using the default 250 MHz clock setting, EMAC will not work normally. You might observe that the TX packet frames fail to send and RX packet frames are received with cyclic redundancy check (CRC) errors.

    This is due to RMII interface requires 50 MHz REF_CLK. The default 250 MHz clock is meant for the RGMII interface.

     

    Resolution

    Select EMAC clock frequency as 50 MHz when choosing the RMII interface as shown in the following figure:

     

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs