Why does the Hard IP Reconfiguration Interface deadlock when using the P-Tile Intel® FPGA IP for PCI Express*?

Due to a limitation in the P-Tile Intel® FPGA IP for PCI Express* with the Intel® Quartus® Prime Pro Edition Software version 21.4, the Hard IP Reconfiguration Interface can deadlock with "hip_reconfig_waitrequest_o" asserted. The issue can't be resolved by resetting the P-Tile Intel® FPGA IP for PCI Express* using the "pin_perst_n".

To avoid this issue, ensure that the Hard IP Reconfiguration Interface is not used during the assertion of "pin_perst_n".

The limitation will be fixed in a future version of the Intel® Quartus® Prime Pro Edition Software.