Article ID: 000090770 Content Type: Error Messages Last Reviewed: 05/26/2022

Error (265064): Intel FPGA IP Evaluation Mode specification file "ip/jesd_rx_bare/jesd_rx_bare_intel_jesd204c_f_0/intel_jesd204c_f_100/synth/rx/j204c_f_rx_base.ocp"

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro edition v21.4, this error will appear when generating the F-Tile JESD204C Intel® FPGA IP.

    Error (265064): Intel FPGA IP Evaluation Mode specification file "ip/jesd_rx_bare/jesd_rx_bare_intel_jesd204c_f_0/intel_jesd204c_f_100/synth/rx/j204c_f_rx_base.ocp" targets entity "j204c_f_rx_base", but entity "j204c_gdr_rx_base" is defined in specification file
    Error (18389): Can't read Intel FPGA IP Evaluation Mode specification file -- "ip/jesd_rx_bare/jesd_rx_bare_intel_jesd204c_f_0/intel_jesd204c_f_100/synth/rx/j204c_f_rx_base.ocp is invalid"

    Resolution

    This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software v22.1.

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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