Article ID: 000090679 Content Type: Errata Last Reviewed: 01/11/2023

Why does the F-Tile Ethernet Intel® FPGA Hard IP Design Example fail to generate on Windows*?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Interfaces
  • Windows 11* Family, Windows® 10 family

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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.1, the F-Tile Ethernet Intel® FPGA Hard IP Design Example will fail to generate on Windows*.

    When attempting to generate the design example on Windows*, an error similar to the one shown below will be seen: 
    Error: Failed to generate example design example_design to: ********\eth_f_0_example_design
     

    Resolution

    To work around this problem when using Intel® Quartus® Prime Pro Edition Software version 22.1, generate the design example using Linux*. Once generated the example design can then be compiled on Windows*.
    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 2 products

    Intel® Agilex™ I-Series FPGA Development Kits
    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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