Due to a problem caused by the decoupling between the MAC and link state in the PHY abstraction level introduced in the linux-socfpga 5.9.1, the Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP Ethernet link might not be set up and the speed may be reported as 0 during Linux boot affecting any Intel® FPGA family. The error displayed during Linux boot is as follow:
[ 5.301562] intel_fpga_qse_ll f9020000.ethernet eth0: configuring for phy/10gbase-kr link mode
[ 5.314693] intel_fpga_qse_ll f9020000.ethernet eth0: Speed (0) is not 10000!
To work around this problem in the linux-socfpga 5.1.9 version and newer, the device tree needs to be modified by adding a "fixed link" device tree node at the Ethernet controller device tree node as indicated next. Adding this "fixed link" node will allow the PHY abstraction layer to bring the link up.
Example:
ethernet@0 {
...
fixed-link {
speed = <1000>;
full-duplex;
};
...
};
The formal fix for this problem was released in
- linux-socfpga 5.10.60 :
https://github.com/altera-opensource/linux-socfpga/commit/66e56cf745ca822fc1c051fce3a610d6656bc707
https://github.com/altera-opensource/linux-socfpga/commit/7ee168fb6f6ac0ded3a71c96aaa0036543fe08f8
- linux-socfpga 5.10.100:
https://github.com/altera-opensource/linux-socfpga/commit/4f0ce4a842763a90d89a8650f03285720ac9cb71
https://github.com/altera-opensource/linux-socfpga/commit/89affd122a189259bbc51d34d7144108c055fd95
https://github.com/altera-opensource/linux-socfpga/commit/e6ee8aa50bee0d3683885159e5e4b30d23a2ac
For the latest hardware or software version compatibility information, refer to the User Manual for Intel Stratix 10 FPGA Design Example on Rocketboards.org.