Article ID: 000090431 Content Type: Product Information & Documentation Last Reviewed: 05/23/2022

Why do I read the wrong value when reading the E-Tile Hard IP for Ethernet Intel® FPGA IP registers TXPTP_REVID and RXPTP_REVID?

Environment

  • Intel® Quartus® Prime Pro Edition
  • E-tile Hard IP for Ethernet Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the E-tile Hard IP User Guide, the HW Reset Value value shown for the TXPTP_REVID register in Table 76  (TX 1588 PTP Registers) and the RXPTP_REVID register in Table 77 (RX 1588 PTP Registers) is incorrect,  the correct reset value should be 0x11112015.

    Resolution

    This problem is currently scheduled to be fixed in a future release of the E-tile Hard IP User Guide.

    Related Products

    This article applies to 3 products

    Intel® Stratix® 10 TX FPGA
    Intel® Agilex™ 7 FPGAs and SoC FPGAs
    Intel® Stratix® 10 DX FPGA

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