Article ID: 000090171 Content Type: Error Messages Last Reviewed: 01/03/2023

Why are there simulation errors when using the Intel® Agilex™ R-Tile Avalon® Streaming Intel® FPGA IP for PCI Express design example testbench using the Cadence Xcelium simulator?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Example Application Avalon-Streaming Hard IP for PCI Express
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.4 and earlier, you might encounter the following error:

    xmelab: *F,CUMSTS: Timescale directive missing on one or more modules.
    xmsim: 20.03-s005: (c) Copyright 1995-2020 Cadence Design Systems, Inc.
    xmsim: *F,NOSNAP: Snapshot 'pcie_ed_tb.pcie_ed_tb' does not exist in the libraries.

    Resolution

    This problem has been fixed in the Intel® Quartus® Prime Pro Edition Software version 22.3.
    Note: The Xcelium simulator support is only available in devices with the suffix R2 or R3 in their ordering part numbers (OPNs).

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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