Article ID: 000089367 Content Type: Product Information & Documentation Last Reviewed: 03/23/2022

Can I drive the Intel® Arria® 10 device transceiver pins during power-up and power-down sequencing?

Environment

  • Transceiver Native PHY Intel® Arria® 10 Cyclone® 10 FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    No, you cannot drive the Intel® Arria® 10 device transceiver pins during power-up and power-down sequencing even if the signal is less than 1.1 Vp-p.

     

    You may only drive the Intel Arria 10 device transceiver pins with 0V or tristate during power-up or power-down sequencing.

    Resolution

    Table 126. Pin Tolerance - Power-Up/Power-Down of the Intel® Arria® 10 Core Fabric and General Purpose I/Os Handbook has been updated in version 2022.01.21.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs

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