Article ID: 000089365 Content Type: Troubleshooting Last Reviewed: 12/01/2023

Why do I see the rx_control doesn't work correctly when instantiating the Transceiver Native PHY Intel® Arria® 10/Intel® Cyclone®10 GX FPGA IP as more than one channel with "Enable simplified data interface" option enabled?

Environment

    Intel® Quartus® Prime Pro Edition
    Transceiver Native PHY Intel® Arria® 10 Cyclone® 10 FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.2 and earlier, the outputs of rx_control are not correct when using the Transceiver Native PHY Intel® Arria® 10/Intel® Cyclone®10GX FPGA IP in enhanced basic mode with more than 1 channel and “Enable simplified data interface” enabled.
Only the rx_control of channel 0 is right.

Resolution

This problem is fixed in the Intel® Quartus® Prime Pro Edition Software version 23.3.

Related Products

This article applies to 2 products

Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Cyclone® 10 GX FPGA

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