Article ID: 000088758 Content Type: Error Messages Last Reviewed: 04/18/2023

Warning (332174): Ignored filter at *_altera_stratix10_interface_generator_*.sdc(3): emac_ptp_ref_clock_clk could not be matched with a port.

Environment

    Intel® Quartus® Prime Pro Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software v21.3 or earlier, you may see the following warning message when enabling the emac_ptp_ref_clock_clk pin in the HPS of the Intel® Stratix® 10 device:

Warning(332174): Ignored filter at *_altera_stratix10_interface_generator_*.sdc(3): emac_ptp_ref_clock_clk could not be matched with a port.

Resolution

To work around this problem, please use the timing constraint like the following description:

create_clock -period <period value> -name <clock_name> [get_ports {target emac_ptp_ref_clock_clk name}]

This problem is fixed starting with the Intel® Quartus® Prime Pro/Standard Edition software version 22.4.

Related Products

This article applies to 1 products

Intel® Stratix® 10 SX SoC FPGA

1