Article ID: 000088571 Content Type: Troubleshooting Last Reviewed: 02/17/2023

Why does the signal aux32_rx_rfp fail to assert when using the CPRI Intel® FPGA IP core on the Intel® Stratix®10 E-Tile?

Environment

    Intel® Quartus® Prime Pro Edition
    CPRI
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in the CPRI Intel® FPGA IP core version 20.1, you may observe that the signal aux32_rx_rfp fails to assert when state_l1_synch=6, state_startup_seq=7,aux_rx_seq=63,aux_rx_x=255,aux_rx_z=149.

Resolution

This problem is fixed starting with the Intel® Quartus® Prime Pro/Standard Edition Software version 20.4.

Related Products

This article applies to 1 products

Intel® Stratix® 10 FPGAs and SoC FPGAs

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