Article ID: 000088172 Content Type: Install & Setup Last Reviewed: 01/03/2023

Why does the Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP Design Example generation completed with errors?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Intel® FPGA IP Low Latency 10-Gbps Ethernet MAC and PHY Function IP-10GEUMAC
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    Critical Issue

    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.3, the Low Latency Ethernet 10G MAC Intel® Stratix® 10 FPGA IP Design Example cannot be generated successfully.

     

     

     

    Resolution

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    A patch is available to fix this problem for the Intel® Quartus® Prime Pro Edition Software version 21.3.  Download and install the patch in this KDB article.

    This patch is scheduled to be included in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs

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