Article ID: 000087932 Content Type: Troubleshooting Last Reviewed: 01/17/2023

Why does the Intel® Quartus® Prime Pro Edition Software v21.3 fail to compile in the Support-Logic Generation stages when the design has more than one FGT PMA channel clocked with PMA clocking mode?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Interface Protocols
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software v21.3, if you configure more than one FGT PMA channel with physical medium attachment (PMA) clocking mode in your design, you will run into a known compilation error. This problem happens at the Support-Logic Generation stages during the compilation process. This problem affects the FGT PMA type for both non-return-to-zero (NRZ) and PAM4 mode.

    FHT PMA type and System PLL clocking mode for FGT PMA are not affected by this problem.

     

    Resolution

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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