Article ID: 000087870 Content Type: Error Messages Last Reviewed: 11/02/2021

Error(20561): IOPLL <name> could not be placed in location <location> because this location cannot be used by IOPLLs using Normal or Source Synchronous Compensation

Environment

  • Intel® Quartus® Prime Pro Edition
  • IOPLL Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You may see this error in the Intel® Quartus® Prime Pro Edition Software v21.3 and earlier when using IOPLLs in Banks 3C and 3D in Intel® Agilex™ SoC devices.

    The error occurs because the HPS Shared GPIO Banks (3C & 3D) do not support IOPLLs in Normal and Source Synchronous compensation modes.

    Resolution

    If the IOPLL needs to operate in Normal or Source Synchronous modes, select a location which is not adjacent to the HPS Bank. Alternatively choose another IOPLL compensation mode.

    This information will be added to a future release of the Intel® Agilex™ Clocking and PLL User Guide

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.