Description
This error may be seen during the Intel® L- and H-tile Avalon® Memory-mapped+ IP for PCI Express* DMA example design generation with Intel® Quartus® Prime Design Software.
Resolution
To avoid this error, uncheck the 'Enable bursting Avalon-MM Slave interface' option in the Avalon-MM setting to disable the Bursting Slave module. The DMA example design only supports the Bursting Master module, Read Data Mover module and Write Data Mover module enabled.