Article ID: 000087683 Content Type: Error Messages Last Reviewed: 11/03/2021

Error: pcie_ed.BAR_INTERPRETER.bri_master: TRAFFIC_GEN_CHECK.control_status_slave (0x120..0x13f) overlaps DMA_CONTROLLER.dma_slave (0x0..0xfff)

Environment

  • Intel® Quartus® Prime Pro Edition
  • Avalon-MM Intel® Stratix® 10 Hard IP for PCI Express
  • Avalon-MM Intel® Stratix® 10 Hard IP+ for PCI Express
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    This error may be seen during the Intel® L- and H-tile Avalon® Memory-mapped+ IP for PCI Express* DMA example design generation with Intel® Quartus® Prime Design Software. 

     

     

    Resolution

    To avoid this error, uncheck the 'Enable bursting Avalon-MM Slave interface' option in the Avalon-MM setting to disable the Bursting Slave module. The DMA example design only supports the Bursting Master module, Read Data Mover module and Write Data Mover module enabled.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs

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