Article ID: 000087357 Content Type: Troubleshooting Last Reviewed: 12/21/2022

Why does Intel® Stratix® 10 FPGA Configuration via Protocol (CvP) core image configuration fail?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    In CvP mode, when you perform core image configuration through a PCIe link, the configuration cannot be successfully completed. This issue impacts all Intel® Stratix® 10 FPGAs (production devices). 

    Resolution

    This issue has been fixed in Intel® Quartus® Prime Pro Edition Software version 18.0.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs

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