Article ID: 000087145 Content Type: Troubleshooting Last Reviewed: 12/03/2012

In the 40GbE and 100GbE MAC and PHY IP core, no top-level wrapper files are provided for the 40GbE and 100GbE MAC IP Cores with adapters

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    No top-level wrapper files are provided for the 40GbE and 100GbE MAC IP cores with adapters.

    Resolution

    This issue is fixed in the 12.1 Quartus software release of the IP core.

    For the 12.0 release of the IP core, two unencrypted top-level adapter files are provided for each IP core to accommodate.

    The unencrypted top-level 40GbE adapter files are located in the alt_eth_40g.zip file at:

    • alt_eth_40g\quartus_synth\rtl_src\adapter\rx\alt_e40_adapter_rx.v and
    • alt_eth_40g\quartus_synth\rtl_src\adapter\tx\alt_e40_adapter_tx.v

    The alt_e40_adapter.v wrapper file describes how to hook up these adapter files.

    The unencrypted top-level 100GbE adapter files are located in the alt_eth_100g.zip file at:

    • alt_eth_100g\quartus_synth\rtl_src\adapter\rx\alt_e100_adapter_rx.v and
    • alt_eth_100g\quartus_synth\rtl_src\adapter\tx\alt_e100_adapter_tx.v

    The alt_e100_adapter.v wrapper file describes how to hook up these adapter files.

    For example, in the alt_e*_adapter wrapper file (where * represents 40 for 40GbE IP cores and * represents 100 for 100GbE IP cores), the alt_e*_adapter_rx and alt_e*_adapter_tx modules are instantiated and the outputs are connected to the alt_e* module\'s MAC-level interface signals. Similarly, you can create a top-level wrapper file by instantiating the alt_e*_adapter_rx and alt_e*_adapter_tx modules and connecting the outputs to the alt_e*_mac wrapper.

    Related Products

    This article applies to 2 products

    Stratix® IV FPGAs
    Stratix® V FPGAs

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