Article ID: 000087139 Content Type: Troubleshooting Last Reviewed: 12/11/2015

Arria 10 Gen3 x8 Hard IP for PCI Express using the Avalon-MM Interface with DMA Might Drop a Completion TLP

Environment

  • Intel® Quartus® Prime Pro Edition
  • PCI Express
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The Gen3 x8 Arria 10 Hard IP for PCI Express using the Avalon-MM interface with DMA and 256-tags might overflow the RX Completion buffer. If the Completion buffer overflows, the IP core drops a Completion TLP.

    Resolution

    The workaround is to edit the generated file, <working_dir>/<design_name>/altera_pcie_a10_hip_<ver>/synth/altpcie_a10_hip_hwtcl_<random_number>.v . Search for the instance, altpcieav_256_app. Add the following connections:

    .ko_cpl_spc_header(ko_cpl_spc_header) and .ko_cpl_spc_data(ko_cpl_spc_data).

    This issue will be fixed in a future version of the Arria 10 Gen3 x8 Hard IP for PCI Express using the Avalon-MM with DMA interface.

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices