Critical Issue
Description
The Quartus II software supports reg and logic SystemVerilog
keywords (and, for Verilog, reg) only to indicate the
power-up value of a register. reg and logic are
not supported for other purposes (for example, to pass a value to
other hierarchies).
Resolution
In contexts other than indicating the power-up value of a
register, use wire.For more information, refer to Recommended
HDL Coding Styles in volume 1 of the Quartus
II Handbook.