Article ID: 000087107 Content Type: Troubleshooting Last Reviewed: 12/02/2011

Stratix V Hard IP for PCI Express IP Core Does Not Perform Optional Address Translation Check

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The PCI Express Base Specification states that receivers can optionally check the Address Translation (AT) bits of the Transaction Layer Packet (TLP) and flag the received TLP as malformed if AT is not 2’b00. The Stratix V Hard IP for PCI Express does not perform this check.

    Resolution

    No workaround is required; however, you cannot rely on the AT bits to flag malformed TLPs.

    Related Products

    This article applies to 1 products

    Stratix® V FPGAs

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