Critical Issue
The demonstration testbench for 40GBASE-KR4 variations of the 40- and 100-Gbps Ethernet MAC and PHY IP core cannot simulate successfully with the Synopsys VCS simulator.
Two options are available to you to work around this issue.
You can simulate the 40-100GbE IP core 40GBASE-KR4 demonstration testbench with the Mentor Graphics ModelSim simulator.
Alternatively, you can edit your VCS simulator setup file to remove duplicate module declarations. To ensure that your IP core files are compatible with the Synopsys VCS simulator, edit the file <instance>_sim/synopsys/vcs/vcs_setup.sh to remove the following two lines:
/alt_e40_e10/altera_xcvr_functions.sv
/alt_e40_e100/sv_xcvr_h.sv
This issue is fixed in version 14.0 of the 40- and 100-Gbps Ethernet MAC and PHY MegaCore function.