Article ID: 000087000 Content Type: Troubleshooting Last Reviewed: 10/08/2014

RapidIO II IP Core Does Not Declare Illegal Transaction Decode Error for MAINTENANCE Read Response with Illegal Size

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

When a RapidIO II IP core receives a MAINTENANCE read response with more than 32 bits of payload, and the ILL_TRAN_DECODE_EN bit (bit [27]) of the Logical/Transport Layer Error Enable CSR at offset 0x30C has the value of 1, the IP core should declare an Illegal Transaction Decode error by setting the ILL_TRAN_DECODE bit (bit [27]) of the Logical/Transport Layer Error Detect CSR at offset 0x308 to the value of 1. However, the IP core does not do so.

Resolution

This issue has no workaround.

This issue will be fixed in a future version of the RapidIO II IP core.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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