Article ID: 000086950 Content Type: Troubleshooting Last Reviewed: 06/14/2016

Why are bad blocks in NAND memory being used after programming with quartus_hps?

Environment

  • Quartus® II Subscription Edition
  • Intel® SoC FPGA Embedded Development Suite (SoC EDS) Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The quartus_hps tool erases both the factory NAND bad block markers and the software maintained bad block tables. This can lead to unreliable NAND operation. Symptoms include intermittent or permanent failure to boot from NAND, failure to configure the FPGA from the HPS using NAND and also NAND CRC errors.

    Resolution

    To work around this problem, use U-Boot or Linux to program NAND memory. 

    Note: U-boot can be loaded via the Arm DS-5 Altera Edition debugger, or from FPGA on-chip-ram, and the HPS ethernet or the debugger can be used to transfer the NAND Image to SDRAM for use by u-boot for programming. 

    This problem is scheduled to be fixed in a future release of Quartus.

    Related Products

    This article applies to 4 products

    Cyclone® V SX SoC FPGA
    Cyclone® V ST SoC FPGA
    Cyclone® V SE SoC FPGA
    Intel® Arria® 10 SX SoC FPGA

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