Article ID: 000086917 Content Type: Troubleshooting Last Reviewed: 08/11/2016

Can I use the .sopcinfo file generated during Qsys Testbench generation in the Nios II software build tools for Eclipse?

Environment

    Intel® Quartus® Prime Pro Edition
    Nios® II Embedded Design Suite (EDS)
    Nios® II Processor
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Description

No, .sopcinfo file generated from Testbench generation cannot be used in Eclipse. 

The .sopcinfo file generated during synthesis will be updated when a test bench system is generated in Qsys®.  

The Nios II Software Build Tools for Eclipse must use the .sopcinfo file generated during synthesis, and not the .sopcinfo file generated during test bench generation.

Resolution

To work around this problem in the Qsys software version 16.0 and earlier follow the steps below:

  1. In Qsys, click "Generate HDL".
  2. In the Simulation tab, enable "Create Simulation Model" to either Verilog or VHDL.
  3. Click "Generate". The system will generate the synthesis and test bench files.
  4. Go to Software Build Tools for Eclipse.
  5. Create application and bsp projects using the .sopcinfo file generated during synthesis (not the .sopcinfo file generated during test bench) 

Related Products

This article applies to 1 products

Intel® Programmable Devices

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