Article ID: 000086904 Content Type: Troubleshooting Last Reviewed: 01/18/2023

Why doesn't the Intel® Stratix® 10, Intel Arria® 10, and Intel Cyclone® 10 EMIF IP calibration sequencer start calibration on the second EMIF IP if the first EMIF IP in the same I/O column fails calibration?

Environment

    Intel® Quartus® Prime Pro Edition
    External Memory Interfaces Intel® Arria® 10 FPGA IP
    External Memory Interfaces Intel® Stratix® 10 FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

If any EMIF IP calibration fails, then the calibration of any other EMIF IP residing in the same I/O column will not start.   

 

Resolution

This is an expected behavior according to the IP specification.

Related Products

This article applies to 2 products

Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Stratix® 10 FPGAs and SoC FPGAs

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