Why can’t the Arria® 10 DDR3 IP exit self-refresh mode?

Due to a problem with the Arria® 10 DDR3 IP, you may not be able to transition back to the auto refresh mode if the self-refresh mode is enabled. 

To work around this problem, enable the Self Refresh Auto Exit bit (i.e. cfg_srf_autoexit_en) in the sbcfg1 register of the Memory-Mapped Register (MMR) interface.  When the cfg_srf_autoexit_en bit is set, the DRAM can only enter self-refresh mode when the command queue is empty. The DRAM will exit self-refresh mode when the command queue isn’t empty or a new command is detected on the Avalon interface.