Article ID: 000086823 Content Type: Product Information & Documentation Last Reviewed: 05/26/2017

How do I calculate the power consumption of the ADCs in MAX 10 FPGAs?

Environment

  • Modular Dual ADC core Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    The power consumed by the Modular ADC blocks in MAX® 10 FPGAs has been analysed to be negligibly small. This is based on analysis performed on the largest MAX 10 device variants, with both ADC blocks enabled and each ADC running at the maximum supported frequency.

    As a result, the dynamic power consumption of integrated ADCs is not covered in the MAX 10 PowerPlay® Early Power Estimator Tool.

    Related Products

    This article applies to 1 products

    Intel® MAX® 10 FPGAs

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