Article ID: 000086813 Content Type: Troubleshooting Last Reviewed: 01/13/2023

Why does JAM programming fail on the Intel® Stratix® 10 FPGA Development Kit when there is more than one device in the JTAG chain?

Environment

    Intel® Quartus® Prime Pro Edition
    Jam™ STAPL software
    Virtual JTAG Intel® FPGA IP
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Description

Due to a limitation of the JAM programmer, if you have more than one device in the JTAG chain on the Intel® Stratix® 10 FPGA development board, programming with a JAM file may fail.

This is because there is an Intel MAX® 10 device on the development board which multiplexes the JTAG chain via the Virtual JTAG IP. This IP introduces extra padding bits to the IR and DR which results in the failure.

Resolution

Ensure that only the Intel Stratix 10 device resides in the JTAG chain on the development kit when programming it with a JAM file.

Related Products

This article applies to 2 products

Intel® Stratix® 10 FPGAs and SoC FPGAs
Intel® MAX® 10 FPGAs

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