Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.2 and earlier, the EMIF Traffic Generator 2.0 may fail at 1333MHz or higher clock frequencies for a multi rank LRDIMM targeting the External Memory Interfaces Intel® Agilex™ FPGA IP.
If you encounter bit errors at the start or end of the burst length of 8, increase the additional bus turnaround time (as shown below) under the Controller tab in the External Memory Interfaces Intel® Agilex™ FPGA IP.
Additional read-to-write turnaround time (same rank)
Additional write-to-read turnaround time (same rank)
Additional read-to-read turnaround time (different ranks)
Additional read-to-write turnaround time (different ranks)
Additional write-to-write turnaround time (different ranks)
Additional write-to-read turnaround time (different ranks)
