Intel® MAX® 10 FPGA single supply Modular ADC Intel® FPGA IP generation Error: ADC_ADC: "External Reference Voltage" (external_vref) <voltage> is out of range: 0.0-2.5

You will receive this error message when 'generate HDL' after the analog-to-digital converter (ADC) reference voltage switch from the external mode to internal mode in Intel® MAX® 10 FPGA single supply Modular ADC Intel® FPGA IP . This issue is due to the IP hw.tcl set the allowable range of external reference voltage source to a default value of 0.0-2.5 V instead of valid range allowable by the selected device. 

This problem will be fixed in the future release of the Intel® Quartus® Prime Software version. Follow these steps for temporary workaround when the ADC reference voltage switch from the external mode to internal mode:

1. Set the ADC reference voltage external to 2.5 V and below before switch to internal mode.
2. Generate the HDL.
3. Change the ADC reference voltage to internal mode.
4. Generate the HDL again.