You will receive this error message when 'generate HDL' after the ADC reference voltage switch from the external mode to internal mode in Max® 10 Single Supply Altera Modular ADC IP . This issue is due to the IP hw.tcl set the allowable range of external reference voltage source to a default value of 0.0-2.5V instead of valid range allowable by the selected device.
This problem will be fixed in the future release of Quartus® Prime Software version. Follow the steps below for temporary workaround when the ADC reference voltage switch from the external mode to internal mode:
1. Set the ADC reference voltage external to 2.5V and below before switch to internal mode
2. Generate the HDL
3. Change the ADC reference voltage to internal mode
4. Generate the HDL again