Article ID: 000086766 Content Type: Troubleshooting Last Reviewed: 12/16/2022

Why is the Capture strobe phase shift setting for the PHY Lite for Parallel Interfaces Intel® Agilex™ FPGA IP fixed to 90 degrees?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.1, there may be a hardware test failure related to the Capture strobe phase shift setting for the PHY Lite for Parallel Interfaces Intel® Agilex™ FPGA IP at all supported frequencies. The hardware test failure may be observed when the Capture strobe phase shift is set to:

    -        Any value for interface frequencies less than 150 MHz.

    -        Any value other than 90 degrees for interface frequencies of 150 MHz or more.

    Due to this failure, interface frequencies below 150MHz are not supported in the Intel Agilex PHYLite IP. The minimum interface frequency must be 150MHz.

    For the supported interface frequencies, the Capture strobe phase shift is fixed to 90 degrees in the Intel Agilex PHYLite IP GUI.

    Resolution

    For the Intel® Quartus® Prime Pro Edition Software version 21.1 and later, it is recommended to use Capture strobe phase shift values other than 90 degrees to use dynamic reconfiguration.

    For more details, refer to PHY Lite for Parallel Interfaces Intel® FPGA IP User Guide, Dynamic Reconfiguration section.

    For the Intel Quartus® Prime Pro Edition Software versions 20.4 and 20.3, there is no hardware support enabled for PHY Lite for Parallel Interfaces Intel® Agilex™ FPGA IP.

    Additional information

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition software version 21.3.

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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