Description
Due to a problem in the Intel® Quartus® Prime Standard Edition Software v18.1, you may see the below error message when generating the HDL design file for an RS232 UART IP in the IP Parameter Editor.
Error: rs232_0: The input clock frequency must be known at generation time.
Resolution
To work around this problem, add an RS232 UART instance and clock source instance in Platform Designer, and connect the output clock of the clock source to the input clock port of RS232 UART instance.