Article ID: 000086706 Content Type: Troubleshooting Last Reviewed: 05/30/2017

Why is the Arria 10 DDR4 MMR signal (mmr_slave_readdatavalid_0) toggling even though there is no user read request?

Environment

  • Intel® Quartus® Prime Pro Edition
  • External Memory Interfaces Intel® Arria® 10 FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    If the Enable Memory-Mapped Configuration and Status Register (MMR) Interface option is turned ON under the Controller tab of the Arria® 10 DDR4 IP Parameter Editor, you may see the MMR signal (mmr_slave_readdatavalid_0) toggling even though there is no user read request.

    Resolution

    This problem is scheduled to be fixed in a future release of the Quartus® Prime software.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs

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