Article ID: 000086628 Content Type: Troubleshooting Last Reviewed: 05/20/2021

Is the number of available clock network up to 32 in an Intel® Stratix® 10 device?

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    Description

    No. The number of available clock network is much more than 32 in an Intel® Stratix® 10 device.
    Clock Network Hierarchy section in the Intel® Stratix® 10 Clocking and PLL User Guide shows a simple diagram of the Intel® Stratix® 10 clock network. The diagram shows the programmable clock routing in the first level has 32 clock wires. However, it only describes the structure of a clock sector, and not the structure of an entire device. Since each clock sector has 32 programmable clock routing wires and can route different clock resources respectively, much more than 32 clocks can be distributed using different clock sectors. The maximum number of clock network is dependent on design utilization, placement, and clocking complexity.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs

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