Article ID: 000086504 Content Type: Product Information & Documentation Last Reviewed: 09/11/2012

How can I minimize the Power-on Reset (POR) time for Cyclone III devices?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

You can minimize the POR time in Cyclone® III devices by selecting between a fast POR time or a standard POR time depending on the MSEL pin settings. The fast POR time is 3 ms < TPOR < 9 ms for fast configuration time. The standard POR time is 50 ms < TPOR < 200 ms, which has a lower power-ramp rate. In both cases, you can extend the POR time by using an external component to assert the nSTATUS pin low.

You cannot disable or bypass the POR circuitry.

Related Products

This article applies to 1 products

Cyclone® III FPGAs

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