Why does u-boot halt after a number of repeated FPGA reconfigurations in Intel Agilex® 7 SoC FPGA?

Due to a problem in Intel Agilex® 7 SoC FPGA Rev A device, after a successful FPGA reconfiguration, u-boot may halt after a number of repeated FPGA reconfigurations. 

The number of FPGA reconfigurations is indeterminate.

To work around this problem, please follow the steps below.

Compile a project in Intel® Quartus® Prime Pro Edition Software version 19.4 build 41 or after. And make sure you have the qdb available and all files uncompressed.  

Download the tcl script and run the command

Download u2b_eco.tcl

quartus_cdb -t u2b_eco.tcl <project name>

quartus_asm <project name>.qpf

Note: The first command runs the script file to replace the BCM in the Quartus project, and the second command reruns the assembler to regenerate the sof.