Article ID: 000086458 Content Type: Troubleshooting Last Reviewed: 04/15/2021

Why does u-boot halt after a number of repeated FPGA reconfigurations in Intel® Agilex™ SoC device?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in Intel® Agilex™ SoC Rev A device, after a successful FPGA reconfiguration, u-boot may halt after a number of repeated FPGA reconfigurations.  The number of FPGA reconfigurations is indeterminate.

    Resolution

    To work around this problem, please follow the steps below.

    1, Compile a project in Intel® Quartus® Prime Pro Edition software version 19.4 build 41 or after. And make sure you have the qdb available and all files uncompressed.  

    2, Download the tcl script and run the command

    Download u2b_eco.tcl

    quartus_cdb -t u2b_eco.tcl <project name>

    quartus_asm <project name>.qpf

    Note: The first command runs the script file to replace the BCM in the Quartus project and the second command reruns the assembler to regenerate the sof.

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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