Due to a problem in the Intel® Quartus® Prime Pro Edition software, you may see this internal error when you instantiate any of the following primitives: ALT_INBUF, ALT_OUTBUF, ALT_IOBUF, ALT_BIDIR inside a VHDL 'For Generated' loop.
To work around this problem, unroll the 'For Generate' loop and individually instantiate each of the primitives required as below:
'For Generate' primitives instantiation:
inbuf_diff_gen :
for j in 0 to 2 generate
inbuf_diff_gen : alt_inbuf_diff
port map (
i => rx_data_p(j),
ibar => rx_data_n(j),
o => rx_serial_data(j));
end generate;
Individually instantiated primitives:
port map (
i => rx_data_p(0),
ibar => rx_data_n(0),
o => rx_serial_data(0));
inbuf_diff_inst_1 : alt_inbuf_diff
port map (
i => rx_data_p(1),
ibar => rx_data_n(1),
o => rx_serial_data(1));
inbuf_diff_inst_2 : alt_inbuf_diff
port map (
i => rx_data_p(2),
ibar => rx_data_n(2),
o => rx_serial_data(2));
This problem has been fixed beginning with the Intel® Quartus® Prime Pro Edition software version 18.0