Article ID: 000086356 Content Type: Troubleshooting Last Reviewed: 11/02/2020

Why does the FPGA configuration fail from Linux/U-Boot and cause the HPS to hang on Intel Stratix® 10 SX devices when I use the phase 1 and phase 2 bitstreams with RSU enabled that are generated from different Intel Quartus® Prime Pro?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Why does the FPGA configuration fail from Linux/U-Boot and cause the HPS to hang on Intel Stratix® 10 SX devices when I use the phase 1 and phase 2 bitstreams with RSU enabled that are generated from different Intel Quartus® Prime Pro Edition software versions?

     

    Mixing the phase 1 and phase 2 bitstreams that are generated from different Quartus® Prime Pro Edition software versions is a non-supported use case.

    Resolution

    No workaround/patch can be provided. Intel supported methodology is to generate the phase 1 and phase 2 bitstreams using the same Quartus® Prime Pro Edition software version (including patches if applicable).

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 SX SoC FPGA

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