Article ID: 000086352 Content Type: Troubleshooting Last Reviewed: 05/16/2025

Why are random suffixes added to the IP component files generated by Platform Designer in the Quartus® Prime software?

Environment

    Intel® Quartus® Prime Pro Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

In the Quartus® Prime Pro Edition software, the Platform Designer will append unique suffixes (hashes) to the IP component file names during generation to ensure the file's uniqueness. The file's uniqueness is necessary because the IP component is dynamic, and the RTL for the IP is generated during runtime based on the input parameters. A given set of parameter values produces the same hash for each generation. This methodology ensures no collisions between the multiple variants of the same IP.

Resolution

This information was added in the Quartus® Prime Pro Edition User Guide: Platform Designer version 18.1.

Related Products

This article applies to 3 products

Intel® Stratix® 10 FPGAs and SoC FPGAs
Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Cyclone® 10 GX FPGA

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