Article ID: 000086348 Content Type: Error Messages Last Reviewed: 11/25/2024

WARNING: **.vcd(**): Unbalanced or missing $scope/$upscope declaration

Environment

  • Intel® Quartus® Prime Pro Edition
  • Signal Tap Logic Analyzer Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Signal Tap logic analyzer version 17.1, you may see this warning when you convert the Value Change Dump (VCD) file into Wave Log Format (WLF) file.

    The conversion will be successful but the bundled bus in the WLF file does not show the correct value. You can only view the bus as in individual bits.

    Resolution

    You can only view the bus as in individual bits in the WLF file.

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices

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