Article ID: 000086189 Content Type: Troubleshooting Last Reviewed: 11/12/2013

Incorrect Clock Connections for Avalon-ST Receive and Transmit Interface

Environment

  • Quartus® II Subscription Edition
  • Ethernet
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    The Avalon Streaming (Avalon-ST) receive source gets wrongly connected to the transmit clock and the Avalon-ST transmit sink gets wrongly connected to the receive clock.

    However, the RTL port for the transmit clock connection interface is correct for the Avalon-ST receive source and the RTL port for the receive clock connection interface is correct for the Avalon-ST transmit sink.

    This issue affects all MAC designs that enable internal FIFO.

    Resolution

    Apply the same clock source for the Avalon-ST receive and transmit interfaces.

    If you need to use different clock sources, connect the clock source intended for the transmit interface to the receive clock connection, and the clock source intended for the receive interface to the transmit clock connection.

    This issue is fixed in version 13.1 of the Triple Speed Ethernet MegaCore function.

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