Article ID: 000086117 Content Type: Product Information & Documentation Last Reviewed: 07/03/2014

How do I get the Regfield Block to work for all Avalon-ST Access Types?

Environment

    Quartus® II Subscription Edition
    DSP Builder for Intel® FPGAs Pro Edition
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Critical Issue

Description

In DSP Builder version 13.1 and earlier, the RegFiled block may work only for one particular bus access type. Pipelined reads are not allowed, so you have to hold the data and address for the bus latency of the system number of cycles each time.

DSP Builder version 14.0 and later allows pipelined reads for the RegField bock. In addition, you can use any ModelBus block outside of GPIn, GPOut, ChannelIn, and ChannelOut blocks.

Resolution

To work around this problem and allow pipelined reads, upgrade to DSP Builder v14.0.

Related Products

This article applies to 1 products

Intel® Programmable Devices

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