Why does the Nios® II processor with ECC enabled triggers the ECC error unexpectedly upon reset?

Due to a problem in the Quartus® Prime Design Software version 17.1 and earlier, the Nios II processor with ECC enabled may trigger the ECC error unexpectedly upon reset.

To work around this problem, follow the steps below:

• Change the following code in nios_dcache.pm file located in "<Your Quartus installation directory>/ip/altera/nios2_ip/altera_nios2_gen2/nios2_lib".

            nios_sdp_ram->add({

                name => $Opt->{name} . "_dc_data",

                Opt                         => $Opt,

                data_width            => $dc_data_data_sz,

                address_width      => $dc_data_addr_sz,

                num_words           => $dc_data_num_addrs,

                read_during_write_mode_mixed_ports => qq("OLD_DATA"),

• Change the following code in nios_icache.pm file located in "<Your Quartus installation directory>/ip/altera/nios2_ip/altera_nios2_gen2/nios2_lib".

            nios_sdp_ram->add({         

                name => $Opt->{name} . "_ic_data",

                Opt                     => $Opt

                data_width        => $ic_data_data_sz,

                address_width  => $ic_data_addr_sz,

                num_words       => $ic_data_num_addrs,

                read_during_write_mode_mixed_ports => qq("OLD_DATA"),

• Re-generate your HDL in Platform Designer (Qsys).

This problem is scheduled to be fixed in a future version of the Quartus® Prime Design Software.