Article ID: 000086082 Content Type: Error Messages Last Reviewed: 01/26/2018

Internal Error: Sub-system: PTI, File: /quartus/tsm/pti/pti_tdb_builder.cpp, Line: 1073

Environment

    Intel® Quartus® Prime Pro Edition
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Description

Due to a problem in the Intel® Quartus® Prime Pro Edition software version 17.1 Update 1 and earlier, you may see this internal error during compilation of an Intel Stratix® 10 design when using Signal lTap.

The internal error may occur when the Signal Tap file taps dedicated HPS nodes that are not accessible.

Resolution

To work around this problem remove any dedicated HPS connections from the Signal Tap file.
The "Signal Tap: pre-synthesis" Filter or "Signal Tap: post-fitting" filter should be used when adding nodes to a Signal Tap file which will only return nodes that are accessible.

This problem is scheduled to be resolved in a future release of the Intel Quartus Prime Pro Edition software.

Related Products

This article applies to 1 products

Intel® Stratix® 10 FPGAs and SoC FPGAs

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