Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 17.1, you may see this internal error in your Intel Stratix® 10 design. This error occurs when there is an illegal floorplan assignment related to the HBM(High Bandwidth Memory) II IP.
To avoid this error, ensure the LABs adjacent to the hard portion of the HBM II IP are available for the tool to place the soft portion of the HBM II IP.
In a future release of the Intel® Quartus® Prime Pro Edition Software, there is scheduled to be an explicit user error message.