Article ID: 000085851 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does formal verification report that the golden and processed design with duplicated register are not equivalent?

Environment

  • Verification
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    When you use the Physical Synthesis Perform register duplication option in the Quartus® II software versions 7.0 and earlier, some registers with high fanouts are duplicated. If you perform formal verification with Conformal LEC, the tool may report non-equivalence between the golden (RTL) and revised (processed) design for Stratix® II GX designs. The non-equivalance occurs because instance equivalence commands written in the .ctc script file for these duplicated registers are ignored by Conformal LEC.

    This problem has been fixed beginning with the Quartus II software version 7.1.

    To avoid this issue in versions 7.0 and earlier, edit the .ctc file and add the U string after each of the Golden and Revised instance names for all duplicated registers in your Stratix II GX design. Adding this string allows Confomal LEC to find the instance and apply the instance equivalence command.

    For example, you may have the following command in the .ctc file:

    add instance equivalence e_I/lc_ff e~SynDup_I/lc_ff -flatten -revised

    Modify this command as follows:

    add instance equivalence e_I/lc_ff/U e~SynDup_I/lc_ff/U -flatten -revised

    Related Products

    This article applies to 1 products

    Stratix® II GX FPGA

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